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19-2656; Rev 3; 6/10
P Reset Circuits with Long Manual Reset Setup Period
General Description
The MAX6443-MAX6452 low-current microprocessor reset circuits feature single or dual manual reset inputs with an extended setup period. Because of the extended setup period, short switch closures (nuisance resets) are ignored. On all devices, the reset output asserts when any of the monitored supply voltages drops below its specified threshold. The reset output remains asserted for the reset timeout period (210ms typ) after all monitored supplies exceed their reset thresholds. The reset output is one-shot pulse asserted for the reset timeout period (140ms min) when selected manual reset input(s) are held low for an extended setup timeout period. These devices ignore manual reset transitions of less than the extended setup timeout period. The MAX6443-MAX6448 are single fixed-voltage P supervisors. The MAX6443/MAX6444 have a single extended manual reset input. The MAX6445/MAX6446 have two extended manual reset inputs. The MAX6447/ MAX6448 have one extended and one immediate manual reset input. The MAX6449-MAX6452 have one fixed-threshold P supervisor and one adjustable-threshold P supervisor. The MAX6449/MAX6450 have two delayed manual reset inputs. The MAX6451/MAX6452 have one delayed and one immediate manual reset input. The MAX6443-MAX6452 have an active-low RESET with push-pull or open-drain output logic options. These devices, offered in small SOT packages, are fully guaranteed over the extended temperature range (-40C to +85C).
Features
o Single- or Dual-Supply Voltage Monitors o Precision Factory-Set Reset Thresholds from 1.6V to 4.6V o Adjustable Threshold to Monitor Voltages Down to 0.63V (MAX6449-MAX6452) o Single or Dual Manual Reset Inputs with Extended Setup Period o Optional Short Setup Time Manual Reset Input (MAX6447/MAX6448 and MAX6451/MAX6452) o Immune to Short Voltage Transients o Low 6A Supply Current o Guaranteed Valid Reset Down to VCC = 1.0V o Active-Low RESET (Push-Pull or Open-Drain) Outputs o 140ms (min) Reset Timeout Period o Small SOT143 and SOT23 Packages
MAX6443-MAX6452
Ordering Information
PART MAX6443US_ _ _-T MAX6444US_ _ _-T TEMP RANGE -40C to +85C -40C to +85C PIN-PACKAGE 4 SOT143
Applications
Set-Top Boxes Consumer Electronics DVD Players Cable/DSL Modems MP3 Players Industrial Equipment Automotive Medical Devices
4 SOT143 Note: The first "_ _ " is a placeholder for the threshold voltage level of the devices. A desired threshold level is set by the twonumber suffix found in Table 1. The third "_" is a placeholder for the manual reset setup period of the devices. A desired setup period is set by the letter suffix found in Table 2. All devices are available in tape-and-reel only. There is a 2500piece minimum order increment for standard versions (Table 2). Sample stock is typically held on standard versions only. Nonstandard versions require a minimum order increment of 10,000 pieces. Contact factory for availability. Devices are available in both leaded and lead-free packaging. Specify lead-free by replacing "-T" with "+T" when ordering.
Pin Configurations
TOP VIEW
GND 1 4 VCC
MAX6443 MAX6444
RESET 2 3 MR1
SOT143
Pin Configurations continued at end of data sheet.
________________________________________________________________ Maxim Integrated Products
1
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P Reset Circuits with Long Manual Reset Setup Period MAX6443-MAX6452
ABSOLUTE MAXIMUM RATINGS
All Voltages Referenced to GND VCC ..........................................................................-0.3V to +6V Open-Drain RESET ..................................................-0.3V to +6V Push-Pull RESET ........................................-0.3V to (VCC + 0.3V) MR1, MR2, MR2, RSTIN ..........................................-0.3V to +6V Input Current, All Pins.......................................................20mA Continuous Power Dissipation (TA = +70C) 4-Pin SOT143 (derate 4.0mW/C above +70C)...........320mW 5-Pin SOT23 (derate 7.1mW/C above +70C).............571mW 6-Pin SOT23 (derate 8.7mW/C above +70C).............696mW Operating Temperature Range .......................... -40C to +85C Junction Temperature ......................................................+150C Storage Temperature Range .............................-65C to +150C Lead Temperature (soldering, 10s) .................................+300C Soldering Temperature (reflow) Lead(Pb)-free.....................................................+260C Containing lead................................................ +240C
Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(VCC = 1.0V to 5.5V, TA = -40C to +85C, unless otherwise specified. Typical values are at TA = +25C.) (Note 1)
PARAMETER Operating Voltage Range VCC Supply Current SYMBOL VCC ICC VCC = 5.5V, no load VCC = 3.6V, no load 46 44 31 29 VCC Reset Threshold VTH 26 23 22 17 16 Reset Threshold Tempco Reset Threshold Hysteresis RSTIN Threshold RSTIN Threshold Hysteresis RSTIN Input Current RSTIN to Reset Output Delay Reset Timeout Period VCC to RESET Output Delay tRP tRD VCC falling at 1mV/s K Manual Reset Minimum Setup Period Pulse Width L tMR S T 6.72 4.48 2.24 1.12 VTH-RSTIN VHYST IRSTIN MAX6449-MAX6452 MAX6449-MAX6452 MAX6449-MAX6452 MAX6449-MAX6452, VRSTIN falling at 1mV/s 140 -25 15 210 20 10.08 6.72 3.36 1.68 13.44 8.96 s 4.48 2.24 280 TA = 0C to +85C TA = -40C to +85C 0.615 0.610 2.5 +25 4.50 4.25 3.00 2.85 2.55 2.25 2.12 1.62 1.52 CONDITIONS MIN 1.0 7 6 4.63 4.38 3.08 2.93 2.63 2.32 2.19 1.67 1.58 60 2 x VTH 0.630 0.645 0.650 TYP MAX 5.5 20 16 4.75 4.50 3.15 3.00 2.70 2.38 2.25 1.71 1.62 ppm/C mV V mV nA s ms s V UNITS V A
2
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P Reset Circuits with Long Manual Reset Setup Period
ELECTRICAL CHARACTERISTICS (continued)
(VCC = 1.0V to 5.5V, TA = -40C to +85C, unless otherwise specified. Typical values are at TA = +25C.) (Note 1)
PARAMETER MR2 Minimum Setup Period Pulse Width MR2 Glitch Rejection MR2 to RESET Delay Manual Reset Timeout Period MR1 to VCC Pullup Impedance MR2 to VCC Pullup Impedance MAX6445/MAX6446/MAX6449/MAX6450 VCC 1.00V, ISINK = 50A, RESET asserted VCC 1.20V, ISINK = 100A, RESET asserted VOL VCC 2.55V, ISINK = 1.2mA, RESET asserted VCC 4.25V, ISINK = 3.2mA, RESET asserted VCC 1.80V, ISOURCE = 200A, RESET deasserted RESET Output High (Push-Pull) VOH VCC 3.15V, ISOURCE = 500A, RESET deasserted VCC 4.75V, ISOURCE = 800A, RESET deasserted RESET Open-Drain Leakage Current MR1, MR2, MR2 Input Low Voltage MR1, MR2, MR2 Input High Voltage ILKG VIL VIH 0.7 x VCC RESET deasserted 0.8 x VCC 0.8 x VCC 0.8 x VCC 1 0.3 x VCC A V V V tMRP SYMBOL CONDITIONS MAX6447/MAX6448/MAX6451/MAX6452 MAX6447/MAX6448/MAX6451/MAX6452 MAX6447/MAX6448/MAX6451/MAX6452 140 25 25 MIN 1 100 200 210 50 50 280 75 75 0.3 0.3 V 0.3 0.4 TYP MAX UNITS s ns ns ms k k
MAX6443-MAX6452
RESET Output Low (Open Drain or Push-Pull)
Note 1: Devices production tested at TA = +25C. Overtemperature limits are guaranteed by design.
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P Reset Circuits with Long Manual Reset Setup Period MAX6443-MAX6452
Typical Operating Characteristics
(VCC = 3.3V, TA = +25C, unless otherwise noted.)
SUPPLY CURRENT vs. SUPPLY VOLTAGE
MAX6443/52 toc01
NORMALIZED RESET TIMEOUT PERIOD vs. TEMPERATURE
MAX6443/52 toc02
MAXIMUM TRANSIENT DURATION vs. RESET THRESHOLD OVERDRIVE
MAX6443/52 toc03
9 8 SUPPLY CURRENT (A) 7 6 5 4 3 2 1 0 TA = -40C TA = +25C TA = +85C
1.05 1.04 NORMALIZED TIMEOUT PERIOD 1.03 1.02 1.01 1.00 0.99 0.98 0.97 0.96 0.95
250
TRANSIENT DURATION (s)
200
150 RESET OCCURS ABOVE THE CURVE 100
50 VTH = 4.4V 0 -40 -15 10 35 60 85 0 200 400 600 800 1000 TEMPERATURE (C) RESET THRESHOLD OVERDRIVE (mV)
1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 SUPPLY VOLTAGE (V)
NORMALIZED VCC RESET THRESHOLD vs. TEMPERATURE
MAX6443/52 toc04
VCC TO RESET DELAY vs. TEMPERATURE
MAX6443/52 toc05
RSTIN TO RESET DELAY vs. TEMPERATURE (RSTIN FALLING)
23.6 RSTIN TO RESET DELAY (s) 23.2 22.8 22.4 22.0 21.6 21.2 20.8 20.4 20.0 RSTIN FALLING AT 1mV/s
MAX6443/52 toc06
1.03 NORMALIZED VCC RESET THRESHOLD 1.02 1.01 1.00 0.99 0.98 0.97 -40 -15 10 35 60
24.0 23.6 VCC TO RESET DELAY (s) 23.2 22.8 22.4 22.0 21.6 21.2 20.8 20.4 20.0 VCC = FALLING AT 1mV/s
24.0
85
-40
-15
10
35
60
85
-40
-15
10
35
60
85
TEMPERATURE (C)
TEMPERATURE (C)
TEMPERATURE (C)
MANUAL RESET TO RESET DELAY (MAX6445L/MAX6446L/MAX6449L/MAX6450L)
MAX6443/52 toc07
VCC TO RESET DELAY
MAX6443/52 toc08
VCC = 5V MR1 (5V/div) VCC = 4.5V VTH = 4.392V VCC (100mV/div) VCC = 4.3V MR2 (5V/div)
RESET (5V/div) TIME (1s/div) TIME (100s/div)
RESET (2V/div)
4
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P Reset Circuits with Long Manual Reset Setup Period
Pin Description
PIN MAX6443 MAX6444 1 MAX6445 MAX6446 2 MAX6447 MAX6448 2 MAX6449 MAX6450 2 MAX6451 MAX6452 2 NAME GND Ground Active-Low Push-Pull or Open-Drain Output. RESET changes from high to low when VCC or RSTIN drops below its selected reset threshold and remains low for the 210ms reset timeout period after all monitored power-supply inputs exceed their selected reset thresholds. RESET is one-shot pulsed low for the reset timeout period (140ms min) after selected manual reset inputs are asserted longer than the specified setup period. For the open-drain output, use a minimum 20k pullup resistor to VCC . Manual Reset Input, Active Low. Internal 50k pullup to VCC. Pull MR1 low for the typical input pulse width (tMR) to one-shot pulse RESET for the reset timeout period. MR1 -- 3 -- 3 -- Manual Reset Input, Active Low. Pull both MR1 and MR2 low for the typical input pulse width (tMR) to oneshot pulse RESET for the reset timeout period. VCC VCC Voltage Input. Power supply and input for the primary microprocessor voltage reset monitor. Manual Reset Input, Active Low. Internal 50k pullup to VCC. Pull both MR1 and MR2 low for the typical input pulse width (tMR) to one-shot pulse RESET for the reset timeout period. Manual Reset Input. Pull the MR2 high to immediately one-shot pulse RESET for the reset timeout period. Reset Input. High-impedance input to the adjustable reset comparator. Connect RSTIN to the center point of an external resistor-divider to set the threshold of the externally monitored voltage. FUNCTION
MAX6443-MAX6452
2
1
1
1
1
RESET
3
--
3
--
3
4
4
4
4
4
--
5
--
6
--
MR2
--
--
5
--
6
MR2
--
--
--
5
5
RSTIN
Detailed Description
Reset Output
The reset output is typically connected to the reset input of a microprocessor (P). A P's reset input starts or restarts the P in a known state. The MAX6443- MAX6452 P supervisory circuits provide the reset logic to prevent code-execution errors during powerup, power-down and brownout conditions (see the Typical Operating Circuit). RESET changes from high to low whenever the monitored voltages (RSTIN or VCC) drop below the reset
threshold voltages. Once VRSTIN and VCC exceed their respective reset threshold voltages, RESET remains low for the reset timeout period and then goes high. RESET is one-shot pulsed whenever selected manual reset inputs are asserted. RESET stays asserted for the normal reset timeout period (140ms min). RESET is guaranteed to be in the proper output logic state for VCC inputs 1V. For applications requiring valid reset logic when VCC is less than 1V, see the Ensuring a Valid RESET Output Down to VCC = 0V section.
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P Reset Circuits with Long Manual Reset Setup Period MAX6443-MAX6452
Manual Reset Input Options
Unlike typical manual reset functions associated with supervisors, each device in the MAX6443-MAX6452 family includes at least one manual reset input, which must be held logic-low for an extended setup period (t MR ) before the RESET output asserts. When valid manual reset input conditions/setup periods are met, the RESET output is one-shot pulse asserted low for a fixed reset timeout period (140ms min). Existing frontpanel pushbutton switches (i.e., power on/off, channel up/down, or mode select) can be used to drive the manual reset inputs. The extended manual reset setup period prevents nuisance system resets during normal front-panel usage or resulting from inadvertent shortterm pushbutton closure. The MAX6443/MAX6444, MAX6447/MAX6448, and MAX6451/MAX6452 include a single manual reset input with extended setup period (MR1). The MAX6445/ MAX6446 and MAX6449/MAX6450 include two manual reset inputs (MR1 and MR2) with extended setup periods. For dual MR1, MR2 devices, both inputs must be held low simultaneously for the extended setup period (tMR) before the reset output is pulse asserted. The dual extended setup provides greater protection from nuisance resets. (For example, the user or service technician is informed to simultaneously push both the on/off button and the channel-select button for 6.72s (L suffix) to reset the system.) The MAX6443-MAX6452 RESET output is pulse asserted once for the reset timeout period after each valid manual reset input condition. At least one manual reset input must be released (go high) and then be driven low for the extended setup period before RESET asserts again. Internal timing circuitry debounces low-to-high manual reset logic transitions, so no external circuitry is required. Figure 1 illustrates the single manual reset function of the MAX6443/MAX6444 single-voltage monitors, and Figure 2 represents the dual manual reset function of the MAX6445/MAX6446 and MAX6449/MAX6450. The MAX6447/MAX6448 and MAX6451/MAX6452 include both an extended setup period and immediate setup period manual reset inputs. A low-to-high MR2 rising edge transition immediately pulse asserts the RESET output for the reset timeout period (140ms min). If the MAX6447/MAX6448 and MAX6451/MAX6452 MR2 input senses another rising edge before the end of the 140ms timeout period (Figure 3), the internal timer clears and begins counting again. If no rising edges are detected within the 210ms timeout period, RESET deasserts. The high-to-low transition on MR2 input is internally debounced for 210ms to ensure that
RESET TIMEOUT PERIOD 210ms MR1 SETUP PERIOD tMR
MR1
RESET
Figure 1. MAX6443/MAX6444 Manual Reset Timing Diagram
210ms
MR1
tMR MR2
RESET
Figure 2. MAX6445/MAX6446/MAX6449/MAX6450 Manual Reset Timing Diagram
there are no false RESET assertions when MR2 is driven from high to low (Figure 4). The MR2 input can be used for system test purposes or smart-card-detect applications (see the Applications Information section).
Adjustable Input Voltage (RSTIN)
The MAX6449-MAX6452 monitor the voltage on RSTIN using an adjustable reset threshold set with an external resistor voltage-divider (Figure 5). Use the following formula to calculate the externally monitored voltage (VMON-TH): VMON-TH = VTH-RSTIN (R1+ R2)/R2 where VMON-TH is the desired reset threshold voltage and V TH-RSTIN is the reset input threshold (0.63V). Resistors R1 and R2 can have very high values to minimize current consumption because of low leakage currents. Set R2 to some conveniently high value (250k, for example), and calculate R1 based on the desired reset threshold voltage, using the following formula: R1 = R2 (VMON-TH/VTH-RSTIN - 1)
6
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P Reset Circuits with Long Manual Reset Setup Period MAX6443-MAX6452
t < 210ms COUNTER RESET 210ms DEBOUNCING PERIOD t = 210ms MR2 MR2 RESET RESET NO RESET OUTPUT ASSERTED
POSITIVE EDGE 210ms TIMEOUT PERIOD
Figure 3. MAX6447/MAX6448/MAX6451/MAX6452 MR2 Assertion DebouncingTiming Diagram
Figure 4. MAX6447/MAX6448/MAX6451/MAX6452 MR2 Deassertion Debouncing Timing Diagram
VMON_TH
VCC
+3.3V
R1
MAX6449 MAX6451
RSTIN VCC
VCC VCC RESET RESET
R2 GND RESET
MAX6443L
LED
P
GND
MR1
NMI
VMON_TH = 0.63 x (R1 + R2) / R2
Figure 5. Calculating the Monitored Threshold Voltages
Applications Information
Interrupt Before Reset
To minimize data loss and speed system recovery, many applications interrupt the processor or reset only portions of the system before a processor hard reset is asserted. The extended setup time of the MAX6443- MAX6452 manual reset inputs allows the same pushbutton (connected to both the processor interrupt and the extended MR1 input, as shown in Figure 6) to control both the interrupt and hard reset functions. If the pushbutton is closed for less than tMR, the processor is only interrupted. If the system still does not respond properly, the pushbutton (or two buttons for the dual manual reset) can be closed for the full extended setup period to hard reset the processor. If desired, connect an LED to the RESET output to blink off (or on) for the reset timeout period to signify when the pushbutton is
PUSHBUTTON SWITCH: CLOSE FOR < 4.48s FOR SYSTEM INTERRUPT; CLOSE FOR > 6.72s FOR SYSTEM RESET
Figure 6. Interrupt Before Reset Application Circuit
closed long enough for a hard reset (the same LED might be used as the front-panel power-on display).
Smart Card Insertion/Removal
The MAX6447/MAX6448/MAX6451/MAX6452 dual manual resets are useful in applications in which both an extended and immediate setup periods are needed. Figure 7 illustrates the insertion and removal of a smart card. MR1 monitors a front-panel pushbutton. When closed for tMR, RESET one-shot pulses low for 140ms min. Because MR1 is internally pulled to VCC through a 50k resistor, the front-panel switch can be connected to
7
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P Reset Circuits with Long Manual Reset Setup Period MAX6443-MAX6452
+3.3V
5V
+1.5V CORE SUPPLY I/O SUPPLY VCC RESET RESET
3.3V
VCC
MAX6451
RSTIN MR1
P
DIGITAL INPUT
MAX6444 MAX6446 MAX6448 MAX6450 MAX6452
RESET
100k
P
MR2 GND
RESET
N
SMART CARD DETECT: IMMEDIATE ONE-SHOT WHEN MANUAL RESET CLOSES
GND
FRONT-PANEL SWITCH STANDARD P INPUT AND tMR MANUAL RESET DELAY
Figure 7. MAX6451/MAX6452 Application Circuit
Figure 8. Interfacing to Other Voltage Levels
a microprocessor for general-purpose I/O control. MR2 monitors a switch to detect when a smart card is inserted. When the switch is closed high (card inserted), RESET one-shot pulses low for 140ms. MR2 is internally debounced for 210ms to prevent false resets when the smart card is removed.
Interfacing to Other Voltages for Logic Compatibility
The open-drain RESET output can be used to interface to a P with other logic levels. As shown in Figure 8, the open-drain output can be connected to voltages from 0 to 6V. Generally, the pullup resistor connected to the RESET connects to the supply voltage that is being monitored at the IC's VCC pin. However, some systems may use the open-drain output to level-shift from the monitored supply to reset circuitry powered by some other supply (Figure 8). Keep in mind that as the supervisor's VCC decreases toward 1V, so does the IC's ability to sink current at RESET. RESET is pulled high as VCC decays toward 0. The voltage where this occurs depends on the pullup resistor value and the voltage to which it is connected.
8
When VCC falls below 1V, RESET current-sinking capabilities decline drastically. The high-impedance CMOSlogic inputs connected to RESET can drift to undetermined voltages. This presents no problems in most applications, because most Ps and other circuitry do not operate with VCC below 1V. In applications in which RESET must be valid down to 0V, add a pulldown resistor between RESET and GND for the push-pull outputs. The resistor sinks any stray leakage currents, holding RESET low (Figure 9). The value of the pulldown resistor is not critical; 100k is large enough not to load RESET and small enough to pull RESET to ground. The external pulldown cannot be used with the open-drain reset outputs.
Ensuring a Valid RESET Down to VCC = 0V (Push-Pull RESET)
Transient Immunity
In addition to issuing a reset to the P during power-up, power-down, and brownout conditions, these supervisors are relatively immune to short-duration falling transients (glitches). The graph Maximum Transient Duration vs. Reset Threshold Overdrive in the Typical Operating Characteristics section shows this relationship.
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P Reset Circuits with Long Manual Reset Setup Period
VCC
MAX6443 MAX6445 MAX6447 MAX6449 MAX6451
VCC
RESET 100k GND
The area below the curves of the graph is the region in which these devices typically do not generate a reset pulse. This graph was generated using a falling pulse applied to VCC, starting above the actual reset threshold (VTH) and ending below it by the magnitude indicated (reset threshold overdrive). As the magnitude of the transient increases (VCC goes further below the reset threshold), the maximum allowable pulse width decreases. Typically, a VCC transient that goes 100mV below the reset threshold and lasts 20s or less does not cause a reset pulse to be asserted.
MAX6443-MAX6452
Figure 9. Ensuring RESET Valid to VCC = 0V
Table 1. Reset Voltage Threshold
PART NO. SUFFIX (__) 46 44 31 29 26 23 22 17 16 VCC NOMINAL VOLTAGE THRESHOLD (V) 4.625 4.375 3.075 2.925 2.625 2.313 2.188 1.665 1.575
Table 3. Standard Versions Table
PART MAX6443US16L MAX6443US23L MAX6443US26L MAX6443US29L MAX6443US46L MAX6444US16L MAX6444US23L MAX6444US26L MAX6444US29L MAX6444US46L MAX6445UK16L MAX6445UK23L MAX6445UK26L MAX6445UK29L MAX6445UK46L MAX6446UK16L MAX6446UK23L MAX6446UK26L MAX6446UK29L MAX6446UK46L MAX6447UK16L MAX6447UK23L MAX6447UK26L MAX6447UK29L MAX6447UK46L TOP MARK KAFW KAFX KAFY KAFK KAFZ KAGA KAGB KAGC KAGD KAFL AEEF AEEG AEEH AEEI AEAO AEEN AEEO AEEP AEAP AEEQ AEEJ AEEK AEAQ AEEL AEEM PART MAX6448UK16L MAX6448UK23L MAX6448UK26L MAX6448UK29L MAX6448UK46L MAX6449UT16L MAX6449UT23L MAX6449UT26L MAX6449UT29L MAX6449UT46L MAX6450UT16L MAX6450UT23L MAX6450UT26L MAX6450UT29L MAX6450UT46L MAX6451UT16L MAX6451UT23L MAX6451UT26L MAX6451UT29L MAX6451UT46L MAX6452UT16L MAX6452UT23L MAX6452UT26L MAX6452UT29L MAX6452UT46L TOP MARK AEER AEES AEET AEEU AEEV ABEL ABNP ABNQ ABNR ABNS ABEM ABNX ABNY ABNZ ABOA ABNT ABEN ABNU ABNV ABNW ABOB ABOC ABOD ABOE ABOF
Table 2. Manual Reset Setup Period (tMR)
PART NO. SUFFIX (_) K L S T MANUAL RESET SETUP PERIOD (s) 10.08 6.72 3.36 1.68
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9
P Reset Circuits with Long Manual Reset Setup Period MAX6443-MAX6452
Pin Configurations (continued)
TOP VIEW
RESET 1 5 MR2 RESET 1 5 MR2
GND 2
MAX6445 MAX6446
4 VCC
GND 2
MAX6447 MAX6448
4 VCC
MR1 3
MR1 3
SOT23-5
SOT23-5
RESET 1
6
MR2
RESET 1
6
MR2
GND 2
MAX6449 MAX6450
5
RSTIN
GND 2
MAX6451 MAX6452
5
RSTIN
MR1 3
4
VCC
MR1 3
4
VCC
SOT23-6
SOT23-6
Ordering Information (continued)
PART MAX6445UK_ _ _-T MAX6446UK_ _ _-T MAX6447UK_ _ _-T MAX6448UK_ _ _-T MAX6449UT_ _ _-T MAX6450UT_ _ _-T MAX6451UT_ _ _-T MAX6452UT_ _ _-T TEMP RANGE -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C PIN-PACKAGE 5 SOT23 5 SOT23 5 SOT23 5 SOT23 6 SOT23 6 SOT23 6 SOT23 6 SOT23
MR1 VCC +3.3V
Typical Operating Circuit
VCC
MAX6444
RESET GND RESET
P
GND
Note: The first "_ _ " is a placeholder for the threshold voltage level of the devices. A desired threshold level is set by the twonumber suffix found in Table 1. The third "_" is a placeholder for the manual reset setup period of the devices. A desired setup period is set by the letter suffix found in Table 2. All devices are available in tape-and-reel only. There is a 2500piece minimum order increment for standard versions (Table 2). Sample stock is typically held on standard versions only. Nonstandard versions require a minimum order increment of 10,000 pieces. Contact factory for availability. Devices are available in both leaded and lead-free packaging. Specify lead-free by replacing "-T" with "+T" when ordering.
RESET TIMEOUT PERIOD 210ms MR1 SETUP PERIOD tMR MR1
RESET
10
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P Reset Circuits with Long Manual Reset Setup Period
Selector Guide
PART MAX6443 MAX6444 MAX6445 MAX6446 MAX6447 MAX6448 MAX6449 MAX6450 MAX6451 MAX6452 MR1 EXT. SETUP MR2 (NO SETUP) -- -- -- -- -- -- MR2 EXT. SETUP -- -- -- -- -- -- RSTIN -- -- -- -- -- -- PUSH-PULL RESET -- -- -- -- -- OPEN-DRAIN RESET -- -- -- -- --
MAX6443-MAX6452
Functional Diagram
VCC
MAX6443- MAX6452
MAX6449- RSTIN MAX6452
RESET TIMEOUT PERIOD (210ms typ)
RESET
VCC 0.63V 1.23V
MANUAL RESET SETUP PERIOD tMR
MR2 ONE-SHOT DEBOUNCE CIRCUIT
MR2
MAX6447 MAX6448 MAX6451 MAX6452
VCC GND MR1 MR2
VCC
MAX6445 MAX6446 MAX6449 MAX6450
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P Reset Circuits with Long Manual Reset Setup Period MAX6443-MAX6452
Chip Information
PROCESS: BiCMOS
Package Information
For the latest package outline information and land patterns, go to www.maxim-ic.com/packages. Note that a "+", "#", or "-" in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing pertains to the package regardless of RoHS status. PACKAGE TYPE 4 SOT143 5 SOT23 6 SOT23 PACKAGE CODE U4-1 U5-1 U6-1 OUTLINE NO. 21-0052 21-0057 21-0058 LAND PATTERN NO. 90-0183 90-0174 90-0175
12
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P Reset Circuits with Long Manual Reset Setup Period
Revision History
REVISION NUMBER 0 REVISION DATE 10/02 Initial release Revised the General Description, Features, Applications, Ordering Information, Absolute Maximum Ratings, Electrical Characteristics, Typical Operating Characteristics, Pin Description, the Manual Reset Input Options, Interrupt Before Reset, and Smart Card Insertion/Removal sections, Functional Diagram, Typical Operating Circuit, Selector Guide, Figures 1, 6, and 7, as well as Tables 2 and 3 to add extended setup timeout specifications. DESCRIPTION PAGES CHANGED --
MAX6443-MAX6452
3
6/10
1, 2, 4, 5-12
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 ____________________ 13
(c) 2010 Maxim Integrated Products Maxim is a registered trademark of Maxim Integrated Products, Inc.

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